We make microprocessors using revolutionary technology!
To overcome Moore's law, it is necessary to use innovative technologies.
We are addressing the problem by increasing the density of information. For this reason, we used the ternary system (instead of the binary).
We have achieved amazing results, the capacity of our prototype is more than 70 billion times greater than a commercial 32-bit CPU.
Our prototype has a ternary RISC architecture with the following characteristics:
- 24 Trit Data BUS
- 12 Trit Address BUS
- 10x10cm CPU Board
- Ternary Signal on external BUS
- RISC Architecture with Ternary ISA
In addition to being interesting for the enormous amount of information and BUS Data of reduced dimensions, it can be applied to emerging fields of computer science, thanks to the fact of processing ternary data:
May 08, 2019
- Artificial intelligence and deep learning (is the human brain ternary?)
- Advanced and innovative calculation
- Industrial and anthropomorphic robotics
- Research on algorithms
Ternary Computer at Trieste Mini Maker Faire
Apr 30, 2019
We will be present at the Mini Maker Faire in Trieste, on 25 and 26 May 2019.
Come and visit us!
Ternary Assembler at PyCon Conference
On Sunday 5 May 2019, Cesare di Mauro will present a talk on the creation of a ternary assembler at the PyCon in Florence, Italy.
Cesare Di Mauro is the creator of the Ternary ISA for 5500FP Ternary CPU board.
Ternary CPUs talk
Great success for Ternary Technology at the Maker Faire 2018 in Rome!
At our booth, in Hall 8 of the fair, two projects were presented: a "spacecraft" to explore the countless ternary functions and the new ternary 24-trit CPU card.
Engineers, students, passionate and curious, have literally invaded our stand, asking questions and being amazed for our achievements.
This success pushes us to go even further, faster than before!
Thanks to all those who have come to visit us or who support us!